Instagram CEO Defends Platform in Youth Mental Health Lawsuit Over Social Media Addiction Claims 
Russia Moves to Fully Block WhatsApp as Kremlin Pushes State-Backed MAX App 
Lyft Shares Slide After Weak Q1 Profit Forecast and Surprise 2025 Operating Loss 
AbbVie Sues HHS Over Medicare Price Controls on Botox Under Inflation Reduction Act 
Petrobras Posts Record Oil Exports as Production Surge Fuels Global Expansion 
Standard Chartered Names Peter Burrill as Interim Group CFO Following Diego De Giorgi’s Exit 
FDA Rejects Review of Moderna’s Flu Vaccine Application, Shares Slide 
More U.S. Investors Join Arbitration Against South Korea Over Coupang Dispute 
ByteDance Advances AI Chip Development With Samsung Manufacturing Talks 
U.S. Commerce Department Reaches $252 Million Settlement With Applied Materials Over China Exports 
xAI Co-Founder Jimmy Ba Departs as Elon Musk’s AI Startup Faces Turbulence 
Ralph Lauren Unveils Elegant Fall 2026 Women’s Collection Ahead of New York Fashion Week 
Canadian Airlines Suspend Cuba Flights Amid Jet Fuel Shortage and U.S. Sanctions 
Moderna Stock Drops After FDA Declines Review of mRNA Flu Vaccine 
Samsung Electronics Sees Sustained AI-Driven Demand for Memory Chips Into Next Year 
Boeing Reports Major Supply Chain Quality Improvements After Spirit AeroSystems Deal 
CBA Shares Surge After Record Half-Year Profit as Rate Outlook Improves 
- Comprehensive IP subsystem includes Interlaken, Ethernet PCS, Flex Ethernet and Forward Error Correction IPs
MILPITAS, Calif., Nov. 13, 2017 -- Open-Silicon today announced the availability of a comprehensive IP subsystem targeted at high-bandwidth networking applications. The subsystem expands on Open-Silicon’s existing high speed chip-to-chip Interlaken interface IP to include Ethernet Physical Coding Sublayer (PCS), Flex Ethernet (FlexE) and multi-channel multi-rate Forward Error Correction (FEC) IPs targeted for Ethernet endpoint and Ethernet transport applications. These IPs support a variety of industry standards, multiple data rates and multiple channels, thus eliminating the need for multiple IPs, all while reducing area and integration risk, and increasing performance. These highly flexible niche IPs can be easily tailored to unique customer specific application requirements, and enable fast and seamless integration of the IP into the technology of choice.
|
||||||||||
Open-Silicon’s 8th generation Interlaken IP supports up to 1.2 Tbps high-bandwidth performance and up to 56 Gbps SerDes rates. This chip-to-chip interface IP is fully flexible, configurable and scalable.
The Ethernet PCS IP is compatible with different MII interfaces for connecting to the MAC and works with off-the-shelf MAC and SerDes. It supports 64b/66b encoding/decoding for transmit and receive, and various data rates ranging from 10G to 400G. It complies with the IEEE 802.3 standard and supports Ethernet and Flex Ethernet interfaces.
The Flex Ethernet (FlexE) IP features a generic mechanism that supports various Ethernet MAC rates, ranging from 10G to 400G, and works with off-the-shelf MACs. The FlexE IP supports the Optical Internetworking Forum (OIF) Flex Ethernet standard 1.0, and supports FlexE aware, FlexE unaware and FlexE terminate modes of mapping over the transport network.
The Forward Error Correction (FEC) IP achieves multi-channel multi-rate forward error correction in applications where the bit error rate is very high. It improves bandwidth by enabling 56G PAM4 SerDes integration. This single-instance IP is compatible with off-the-shelf SerDes and supports bandwidths up to 400G with the ability to connect 32 SerDes lanes. It supports the Interlaken and Ethernet standards.
“More and more enterprises and small/medium businesses are shifting their IT investments from in-house IT infrastructure to cloud-based IT services—spending on cloud services is on track to rise by over 30% in 2017,” said Matthias Machowinski, Senior Research Director at IHS Markit. “In response, cloud service providers (CSPs) are heavily investing in their infrastructure, and are currently upgrading their networks to 25/100G. In anticipation of continuing growth, CSPs are already looking towards the future, and once 400G becomes available in 2018/2019, we expect them to rapidly adopt this new technology.”
“Open-Silicon has been on the leading edge of networking related IPs and ASICs for over a decade,” said Vasan Karighattam, Vice President of Engineering for Open-Silicon. “Expanding our IP portfolio to include support for Ethernet endpoint and Ethernet transport enables a multitude of new use cases in high-bandwidth networking.
Availability
Open-Silicon’s networking IP subsystem is available now for ASIC design starts, and as a licensable IP subsystem or individual IP cores.
Visit booth #783 at SC17, in Denver, CO, November 13-16, 2017 to learn more about Open-Silicon’s offerings.
About Open-Silicon
Open-Silicon is a system-optimized ASIC solution provider that innovates at every stage of design to deliver fully tested IP, silicon and platforms. To learn more, please visit www.open-silicon.com
Open-Silicon is a trademark and service mark of Open-Silicon, Inc. registered in the United States and other jurisdictions. All other trademarks are the property of their respective holders.
Photos accompanying this announcement are available at
http://www.globenewswire.com/NewsRoom/AttachmentNg/bbc922fd-2246-4208-8757-13bceefdc867
http://www.globenewswire.com/NewsRoom/AttachmentNg/a7f62409-7508-43d3-ab43-199d42b13cda
Contact Information:
Purvi Shenoy
408-240-5772
[email protected]
Jennifer DeAnda
208-794-7113
[email protected]
