Dolphin Integration Selects Silvaco Variation Manager eXtreme Memory Analysis for SRAM Design at Advanced Nodes

SANTA CLARA, Calif., June 27, 2017 -- Silvaco today announced that Dolphin Integration, a leading provider of power- and density-optimized memory silicon IP, has selected Silvaco’s Variation Manager™ for full memory statistical analysis to perform reliability qualification on SRAM memories designed using advanced process technologies.

Studying memory IP’s against variations and accurately analyzing their yield is a critical challenge faced by memory designers. Running spice simulation on a complete memory spice simulation is a demanding effort and Monte Carlo analysis is impractical even with the state-of-the-art solutions available. Whole Memory Yield estimation is still the ultimate need for memory design. This mission fulfilled by XMA (eXtreme Memory Analysis), the new innovative solution from Silvaco’s Variation Manager. Intuitive and easy-to-use, XMA makes it possible rebuilding and simulating the whole memory with the designer golden spice. Then XMA provides a unique capability allowing to run very efficient variation-aware analyzes for a fast fail detector and yield estimation of the whole memory.

After several years of successful usage of Variation Manager in various process technologies, Dolphin Integration has over the past year increased its partnership with Silvaco, integrating even further Variation Manager into their memory design flow. “This is the solution we were impatiently awaiting. Simulating a whole memory and analyzing accurately and quickly its yield has been a lastingly longed-for feature” said Frédéric Masson, Business Operations Manager at Dolphin Integration. “Coupling Variation Manager with SMASH™, our mixed-signal simulator, results in high-speed yield verification for our memory architectures and improves the overall efficiency of the electrical validation of our products, with the best time-to-market.”

“As one of the most advanced providers of memory IP, Dolphin Integration’s selection of Variation Manager XMA for their new generation of designs is a testament to its effectiveness,” said Firas Mohamed, General Manager of Silvaco France. “Analyzing the whole memory against variations and efficiently detecting failures and accurately estimating its yield have remained unanswered from the EDA market. The innovative Variation Manager XMA uniquely delivers the long-awaited and unprecedented reply to these critical needs.”

Different elements in a memory design must be analyzed with suitable variation analysis techniques.  Variation Manager addresses three key parts of a memory system:

• Bitcell – Analysis is often applied out to 7 sigma and beyond.
• Sense Amp – Analog in nature, fast Monte Carlo or high sigma is used for these portions.
• SRAM block – Larger portion of SRAM beyond the bitcell is analyzed. Extremely high capacity high sigma is required. In addition, Variation Manager remains robust even against highly non-linear phenomena.

Variation Manager is easily integrated into customer design flows and provides an intuitive, easy-to-use interface. It supports a variety of 3^rd party and proprietary transistor-level simulators, and process design kits and SPICE Netlists can be loaded without modification.

ABOUT DOLPHIN INTEGRATION

Dolphin Integration contributes to “enabling low-power Systems-on-Chip” for worldwide customers – up to the major actors of the semiconductor industry – with a unique offering of high-density Foundation, Feature and SoC Fabric of Silicon IP components best at low power-consumption. Over 30 years of experience in the integration of silicon IP components with complementary EDA solutions for a power-integrity driven approach to design, providing ASIC/SoC design and fabrication, make Dolphin Integration a genuine one-stop shop addressing all customers’ needs. It is not just one more supplier of Technology, but the provider of the Dolphin Integration know-how! To learn more, visit www.dolphin-integration.com 

ABOUT SILVACO

Silvaco, Inc. is a leading provider of IP and EDA software tools used for process and device development and for analog/mixed-signal, power IC and memory design. The portfolio also includes tools for power integrity sign off, reduction of extracted netlist for simulation speed up and variation analysis. Silvaco delivers a full TCAD-to-Signoff flow for displays, power electronics, radiation and advanced CMOS along with a complete production-proven IP portfolio including IP licensing and IP management solutions. Headquartered in Santa Clara, California, Silvaco has a global presence with offices in North America, Europe, and Asia. www.silvaco.com 

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