Sony Q3 Profit Jumps on Gaming and Image Sensors, Full-Year Outlook Raised 
Nvidia CEO Jensen Huang Says AI Investment Boom Is Just Beginning as NVDA Shares Surge 
Ford and Geely Explore Strategic Manufacturing Partnership in Europe 
SpaceX Seeks FCC Approval for Massive Solar-Powered Satellite Network to Support AI Data Centers 
Google Cloud and Liberty Global Forge Strategic AI Partnership to Transform European Telecom Services 
Baidu Approves $5 Billion Share Buyback and Plans First-Ever Dividend in 2026 
Dow Hits 50,000 as U.S. Stocks Stage Strong Rebound Amid AI Volatility 
U.S. Stock Futures Slide as Tech Rout Deepens on Amazon Capex Shock 
Trump Signs Executive Order Threatening 25% Tariffs on Countries Trading With Iran 
Global Markets Slide as AI, Crypto, and Precious Metals Face Heightened Volatility 
TSMC Eyes 3nm Chip Production in Japan with $17 Billion Kumamoto Investment 
Trump Backs Nexstar–Tegna Merger Amid Shifting U.S. Media Landscape 
Dollar Near Two-Week High as Stock Rout, AI Concerns and Global Events Drive Market Volatility 
Vietnam’s Trade Surplus With US Jumps as Exports Surge and China Imports Hit Record 
Oracle Plans $45–$50 Billion Funding Push in 2026 to Expand Cloud and AI Infrastructure 
FDA Targets Hims & Hers Over $49 Weight-Loss Pill, Raising Legal and Safety Concerns 
SK hynix has developed the first 12-layer stacked high bandwidth memory (HBM3) chip, which vertically interconnects multiple DRAM chips to increase data processing speed.s.
The 24GB package product increased memory capacity by 50 percent from the previous product
SK hynix, which developed the first-generation HBM in 2013, said it expects the product to be in high demand in sectors such as artificial intelligence (AI) that require a high capacity and fast data processing.
It is currently validating its performance with customers and will be able to start supplying the new products in the second half of the year/
HBM3 succeeds the previous generations of HBM, HBM2, and HBM2E.
According to SK hynix, it was able to develop the 12-layer product because its engineers improved process efficiency and performance stability by applying advanced mass reflow molded underfill technology.
The company also applied through-silicon via (TSV) technology to reduce the thickness of a single DRAM chip by 40 percent and achieved the same stack height level as the 16-gigabyte product.
